| 摘要 |
<p>A flat panel VDU or TV screen has pixel elements controlled by an array of small single crystal semiconductor bars or chips. Power and information are connected directly or capacitatively to the chips; chip surfaces have pick-up pads. X-Y address lines are provided on a VDU panel substrate, and each chip has bridging links to complete continuity of the Y-line. For data address, data lines are provided on the substrate, and decoding an address recognition circuitry is incorporated in each chip. Chips may be responsive to more than one address, and may be addressed either singly or using a single code address. Each chip may control its neighboring pixels. A single crystal wafer is processed and mounted on a support. Chips are defined by back etching the wafer and separated by stretching the support prior to transfer to a substrate. Self aligned electrodes may be produced using a mask stretched on the surface of the support. Alternatively the electrodes may be produced photolithographically, using shallow angle and overhead illumination. The chips or bars may also be located by means of vacuum chucks.</p> |
