发明名称 MEMORY DATA OUTPUT SYSTEM
摘要 PURPOSE:To output an parallel line output continuously and efficiently irrespective of a paper size by providing a ready bit, which becomes ON due to termination of the 1st output data, on the top of an output line counter. CONSTITUTION:In order to eliminate discontinuity of an A4 area and a B4 area developed in an image memory 12, a flip-flop FF14, which operates due to an A4 and B4 paper size start/termination signal from the printer side, is provided in a mechanism controller 18 and implements its function relating to a Y direction counter 13. A ready bit 13-2 of one bit is provided on the upper order of a counter 13 of n-bits 13-1, and said ready bit 13-2 is set to ''1'' due to a termination signal of the A-4 area from the printer side. As a result, since an apparent counted value of the counter 13 becomes larger than the B4 area, a CPU10 has no troubles at the time of development of the B4 area.
申请公布号 JPS60180281(A) 申请公布日期 1985.09.14
申请号 JP19840035599 申请日期 1984.02.27
申请人 FUJITSU KK 发明人 AKITA JIYUUICHI
分类号 G06F3/12;G06F12/00;G06F12/02;G06F13/16;H04N1/21 主分类号 G06F3/12
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