发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
In a CMOS integrated circuit certain high-impedance nodes are particularly susceptible to noise signals from the power supply. The power supply noise rejection is improved by using transistors 72, 74 of one type only, which are formed in tubs, such as N-channel transistors formed in P-type tubs in an N-type substrate, for connection to the critical high-impedance nodes 76. The tubs of these transistors are preferably connected (via 70) to an on-chip regulated power supply 66, 68. Noise rejection is further improved by grounded tubs underlying any conductive runners 80, 82 and capacitors 84 connected to the critical nodes 76. |
申请公布号 |
DE3264963(D1) |
申请公布日期 |
1985.09.05 |
申请号 |
DE19823264963 |
申请日期 |
1982.01.27 |
申请人 |
WESTERN ELECTRIC COMPANY, INCORPORATED |
发明人 |
AHUJA, BHUPENDRA KUMAR;DWARAKANATH, MIRMIRA RAMARAO |
分类号 |
H01L27/092;G05F1/46;H01L21/8238;H01L27/02;H01L29/78;(IPC1-7):H01L23/56;G05F3/16;H01L27/08;H03F1/30 |
主分类号 |
H01L27/092 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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