Fabrication of stacked mos devices.

摘要

In a process for manufacturing vertically integrated MOS devices and circuits, gate oxide (24) and a gate (26) are formed on a semiconductor substrate (10) such as a silicon substrate. A layer (32) of polysilicon is then deposited over the wafer, the polysilicon contacting the substrate silicon through a window (30) in the gate oxide (24). The substrate silicon (10) and the polysilicon (32) are then laser melted and cooled under conditions that encourage crystal seeding (55) from the substrate (10) into the polysilicon (32) over the gate (26). Subsequently, ions are implanted into the silicon substrate (10) and the polysilicon (32) to form accurately vertically aligned source and drain regions (18, 36 and 20, 38). By introducing the source and drain dopants after melt associated seeding of the polysilicon (32), the risk of dopant diffusion into the device channel regions (22, 34) is avoided.