| 摘要 |
PURPOSE:To improve the processing efficiency for selection system of address information by obtaining the next address to receive an access within an execution cycle of the preceding instruction and in an access mode of continuous areas and therefore executing immediately the next instruction after the execution cycle is over with the preceding instruction. CONSTITUTION:In case the value of either one of registers 1' and 2' is renewed with consecutive accesses, the output B of an adder 3' is selected through a gate and sent to a buffer storage BS control part 5'. A signal B is delivered from the adder 3' with addition of the register contents and the data length and then set to the register with the next timing. In such a way, the signal B is transferred to a BS access control part before it is set to the register. Thus the address information necessary for the BS access to be executed next in an execution cycle of a microinstruction can be fed to the BS access control part.
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