| 摘要 |
PURPOSE:To attain detection and correction of an error arisen without being detected and corrected at the 1st decoder by means of the 2nd decoder by constituting the titled circuit with a coder generating the 1st code and the 2nd code on a matrix while being subject to orthogonal opertion and a decoder detecting and correcting the error in the order of the 1st code and the 2nd code. CONSTITUTION:In an error correcting device using a coder 10, the 2nd coder 11, the 1st coder 12, a transmission or recording medium 20, a decoder 30, the 1st decoder 31, and the 2nd decoder 32, the 2nd coder generates the 2nd check code Q1(i=1, 2,...7) satisfying Equation I the same as the 1st coder. The 2nd decoder attains correction as expressed in Equation II depending on the number P of pointers. Thus, the error overlooking is suppressed lower by giving an error detecting capability to the 2nd decoder in this way, and the error correcting capability is the product of the both by giving a single error correcting capability to the 1st code and a 7-fold error correcting capability to the 2nd code so as to realize a very high correcting capability and also to decrease remarkably the number of times of arithmetic for error detection and correction. |
