发明名称 METHOD FOR WIRING IN LSI CHIP
摘要 PURPOSE:To enable to perform a high density wiring using a simple processing and operation by a method wherein the various restrictive conditions, to be taken into consideration when a grid-free channel wiring is performed, are effectively expressed as a weighted restriction graph. CONSTITUTION:As the mutual relations of the wiring to be formed on a channel are expressed by the weighted restriction graph formed on wiring requirements, the layout of the wiring can be clearly obtained from the graph. Accordingly, on the region assigned by a global wiring, a net is asigned from the upper part of the channel to the terminal fro which a wiring required while satisfying clearance based on the result of the graph, and a channel wiring is formed. As the wiring formed as above has no fixed grid, the horizontal track to be used for wiring on a channel region can be chosen freely within the limits which satisfies the established restrictions, thereby enabling to obtain a high density LSI by effectively utilizing space.
申请公布号 JPS60106145(A) 申请公布日期 1985.06.11
申请号 JP19830214653 申请日期 1983.11.14
申请人 SHARP KK 发明人 YONEDA HIROSHI;KANBE HISASHI;INUBUSHI TSUNEO
分类号 H01L21/822;G06F17/50;H01L21/82;H01L27/04 主分类号 H01L21/822
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