发明名称 INTER-CPU COMMUNICATING SYSTEM
摘要 PURPOSE:To process transmitting and receiving information in order of a priority degree for each purpose by providing a transmitting and receiving information connecting wiring between plural CPUs, respectively, and providing a priority degree table in which a priority degree for each purpose of the transmitting and receiving information is mentioned, on each CPU. CONSTITUTION:A CPU1 and 2 are provided with priority degree tables 12 and 22, and a priority degree is given to this priority degree tables 12 and 22 in accordance with an information purpose. Also, weighting is displayed between the CPUs. When the CPU1 transmits a purpose, for instance, a fault processeing request to the CPU2 through an interrupting line 3-1, the CPU2 receives this request by a processing part 21, refers to the priority degree table 22, recognizes that a priority degree of this request is high, and executes a processing of this request. The interrupting line 3-1 and a data line 4-1, and an interrupting line 3-2 and a data line 4-2 are used exclusively for from the CPU1 to the CPU2, and from the CPU2 to the CPU1, respectively.
申请公布号 JPS6095676(A) 申请公布日期 1985.05.29
申请号 JP19830203133 申请日期 1983.10.28
申请人 FUJITSU KK 发明人 OGASAWARA HAJIME;TAKAGI HIROSHI
分类号 G06F15/16;G06F15/17;G06F15/177 主分类号 G06F15/16
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