| 摘要 |
PURPOSE:To prevent the generation of a faulty connection on wiring layer by a method wherein the height of the source, drain and gate electrode of a master slice IC is made equal to the height of the wiring layer, thereby enabling to eliminate the connection in a through hole. CONSTITUTION:A silicon dioxide film is patternized on the gate insulating film 2 located on a semiconductor chip 1. A metal layer 6 and an earth electrode 10 are formed using the film 5 as a mask. Then, the thickness of a gate electrode layer 12 is swollen up using another silicon dioxide film as a mask. Subsequently, the surface of said layer 12 is flattened by performing an etching, and an interlayer insulating film 3 is formed. Then, a silicon dioxide film 7 is patternized. The second layer wiring layer 30 is formed using said film 7 as a mask, and the thickness of the gate electrode layer 12 is swelled up. Then, an insulating film is formed on the whole surface. According to this constitution, a contact hole is unnecessitated, and the generation of a faulty connection on wiring can be prevented. |
