发明名称 MANUFACTURE OF POWER TRANSISTOR
摘要 PURPOSE:To improve the yield by preventing the generation of warps and the like of a semiconductor substrate by a method wherein, using a semiconductor substrate of a large plate thickness, an emitter layer, a base layer, and a collector layer are formed, and an emitter electrode and a base electrode are formed on the surface side of the substrate; thereafter the back of the substrate is cut. CONSTITUTION:Preparing a thick power transistor Si wafer 3 having an N<-> layer 1 and an N<+> layer 2, the emitter layer 5 and the base layer 6 are formed. At this time, an N<++> layer 9 is formed by impurity diffusion to the back of the Si substrate 3 at a high concentration at the same time. Next, after the emitter electrode 5a and the base electrode 6a are formed in the emitter layer 5 and the base layer 6, respectively, the back side of the wafer is cut by grinding, resulting in the reduction of the thickness of the wafer. A high concentration impurity layer 10 is formed by doping of the impurity at a high concentration to the N<+> layer 2 on the back side of this wafer by the use of an ion implantator. When the impurity ions are activated on low temperature annealing by laser annealing, the impurity layer 10 is activated, and the electric characteristic of contact with the electrode metal improves.
申请公布号 JPS6084876(A) 申请公布日期 1985.05.14
申请号 JP19830193169 申请日期 1983.10.14
申请人 MATSUSHITA DENKO KK 发明人 KENO TAKUJI
分类号 H01L29/73;H01L21/331;H01L29/72;H01L29/732;(IPC1-7):H01L29/72 主分类号 H01L29/73
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