发明名称 MOS FIELD-EFFECT TRANSISTOR AND MANUFACTURE THEREOF
摘要 PURPOSE:To increase gm and dielectric withstanding voltage by forming indentations in predetermined width at end sections being in contact with source- drain regions through a gate insulating film for a gate electrode. CONSTITUTION:An SiO2 film 12 and a gate SiO2 film 13 are shaped to the surface of a P-type Si substrate 11, a refractory metallic film 14 is deposited, and an SiO2 film 15 is deposited on the film 14. The refractory metallic film 14 is etched vertically, an SiO2 film 16 is deposited, phosphorus in high concentration is made to be contained through phosphorus treatment, the SiO2 film 16 is etched through RIE, and the SiO2 film 16 is left on the side surface section of a gate in a side wall shape and others are removed. The remaining refractory metallic film 14 is removed only by film thickness tw, indentations are shaped, phosphorus is implanted in low concentration, and N<-> layers 17 are formed through heat treatment. N<+> implanting layers 18' are shaped through implantation in high concentration of arsenic, and N<+> layers 18 are formed through heat treatment. Accordingly, LDD structure having high gm and high dielectric withstanding voltage can be realized.
申请公布号 JPS61226964(A) 申请公布日期 1986.10.08
申请号 JP19850066449 申请日期 1985.04.01
申请人 HITACHI LTD 发明人 AZUMA TAKASHI
分类号 H01L21/265;H01L29/78 主分类号 H01L21/265
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