| 摘要 |
PURPOSE:To reduce the generation of the latch-up of a CMOS by forming a semiconductor layer having a conduction type reverse to a substrate on a buried region having a different conduction type and forming an isolation region reaching up to a buried region on the buried region having the same conduction type as the substrate. CONSTITUTION:An N type buried layer 2 and a P type buried layer 3 are shaped on a P type substrate 1, and an N type epitaxial layer 4 is formed. A P type well layer 5 is formed to the epitaxial layer 4 on the P type buried layer 3 while using a thermal oxide film, etc. as a mask. The conditions of thermal diffusion are controlled so that the well layer 5 and the P type buried layer 3 overlap in the process. A field oxide film 8 is grown to a section except element forming regions, and gate oxide films 9 and gate electrodes 10 are shaped. Source-drain regions 11, 12 for MOSFETs are shaped through ion implantation. Accordingly, the generation of the latch-up of a CMOS can be reduced while elements can be fined. |
