发明名称 FAULT PREVENTING METHOD IN ELECTRONIC EXCHANGE
摘要 PURPOSE:To improve further the reliability in an electronic exchange of a duplex system by adding the hardware having a logical judging section to an answerback bus in the electronic exchange. CONSTITUTION:There occurs an inhibiting state due to runaway of a central processing unit CC0 or CC1 or fault of a program or the like in the electronic exchange comprising an active system (0 system) and a spare system (1 system). To prevent it, the hardware having the logical judging sections 41, 42 is added to the answerback bus. Set information W0, W1 is subject to logical processing via the judging section 41, 42 and the result is fed to inputs 33 and 34 as WW0, WW1. Thus, in designating the logical judgment or the inhibiting state to the software information W0 and W1 relating to the answerback bus, the correction is performed automatically.
申请公布号 JPS6074754(A) 申请公布日期 1985.04.27
申请号 JP19830180460 申请日期 1983.09.30
申请人 FUJITSU KK 发明人 SHIBATA YUUJI;GOUUKON KAZUHIKO
分类号 H04Q3/545;H04M3/22;H04M3/24 主分类号 H04Q3/545
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