发明名称 Time slot multiplex system for the division multiplexing of digital communication signals
摘要 A time slot multiplex device for a time division multiplex system having a voice memory for storing data words received on an input multiplex line, and a control memory for controlling the reading of said voice memory to an output multiplex line, incorporates logic circuitry for generating a plurality of associated pairs of addresses, one for said control memory and one for said voice memory, corresponding to a plurality of equally spaced time slots for a multi-channel connection to said output multiplex line of relatively high band width, in response to a single pair of associated addresses furnished by a higher ranking control means and a logic circuit which, in association with a time slot counter, generates the required addresses during cycling of the time slot counter through a single frame of the time division multiplex system.
申请公布号 US4512014(A) 申请公布日期 1985.04.16
申请号 US19800175692 申请日期 1980.08.06
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 BINZ, REINER;POINTNER, NORBERT
分类号 H04J3/24;H04L12/52;H04Q11/04;H04Q11/08;(IPC1-7):H04J3/02 主分类号 H04J3/24
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