| 摘要 |
PURPOSE:To miniaturize the entire device by converting a binary-state input signal of multi-channel into a series signal in time division and using a common counter, memory section and display to operate them in time division. CONSTITUTION:An input signal 1 from a multi-channel and a channel address signal 13 from a control signal transmission section 4 are inputted to an input multiplex section 2, and the input signal 1 is selected sequentially one by one. On the other hand, a clock control signal 14 presets an integration value of a memory 5 to a counter 6, integrates the clock number corresponding to the on-time of the output of an AND circuit 3, the result is added to the integration value and written in the memory 5. Further, display on a common display section 12 is performed by using a channel address signal 13 and a channel selection section 10. In operating a reset switch 11, a reset/preset selection section 18 is reset, the counter 6 is reset and the integration value of the memory section 5 is reset also by a clock control signal 16. |
