发明名称 TEST SYSTEM OF ALTERNATE MEMORY CONTROL FUNCTION
摘要 PURPOSE:To perform a test of the alternate control function only with the main body of an information processor by writing the inversion data of another element to an alternate element by means of an alternate control register and then reading out the data to produce a reading error of one bit. CONSTITUTION:A request is given to a service processor 6 by a specific instruction of a central processor 4 for setting of data of an alternate control register 3. A control part 71 in a memory 7 reads the data out of a memory element 1 in response to the contents of the register 3 to which the data is set or writes the data to the element 1. Otherwise it is decided whether the data is read out of an alternate element 2 or written to the element 2. An error of one bit is corrected by the hardware within a memory controller 5, and the information on the correction is set at a specific address of memories 7-1 and 7-n respectively. The position of an error bit is known by the information on the 1-bit error information. Thus it is possible to confirm that an alternate element is used as an alternate of a desired element.
申请公布号 JPS6043760(A) 申请公布日期 1985.03.08
申请号 JP19830152292 申请日期 1983.08.19
申请人 FUJITSU KK 发明人 TANAKA JIYUN
分类号 G06F12/16;(IPC1-7):G06F12/16 主分类号 G06F12/16
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