| 摘要 |
PURPOSE:To enable high integration by a method wherein the source and drain regions are formed by etching an amorphous Si film with a metallic wiring pattern as a mask. CONSTITUTION:A gate electrode 10 is forme on the surface of a glass supporting plate 9. An insulation film 11 is grown thereon, and further an amorphous Si film 12 and an N type amorphous Si film 13 are successively formed. Next, the films 13, 12 are etched with the same mask, resulting in the island isolation of the active region. Then, a source region wiring 14, a drain region wiring 15, and other wirings are formed. The source region 16 and the drain region 17 are formed by etching the film 13 with the wirings 14 and 15. This manufacture enables to form with a piece of mask; therefore the areas of the regions 16 and 17 can be reduced. |
