发明名称 MEMORY FAULT RESTORATION SYSTEM
摘要 PURPOSE:To use a memory device of an active system while restoring automatically the memory if a temporary parity check fault is generated because of a software error by writing simultaneously a data from an active or spare system processor to the active system and spare system memory devices at all times. CONSTITUTION:Data are written simultaneously from the active system and spare system processors CPU#0 and CPU#1 to the active system and spare system memory devices MEM#0 and MEM#1 at all times. Thus, the MEM#0 and MEM#1 store the same data at the normal operation. An address register A- REG#0 of the active system and a data check circuit D-CHECK#0 of the active system are connected to the CPU#0 and the MEM#0 and the MEM#1 is connected to the check circuit. Further, the data from the MEM#1 is fed to the CPU#0 via the data register D-REG#0 of the active system to the active system detecting a momentary error to restore and use the MEM#0 automatically.
申请公布号 JPS6039261(A) 申请公布日期 1985.03.01
申请号 JP19830147756 申请日期 1983.08.12
申请人 FUJITSU KK 发明人 TAKANO SHIGERU
分类号 G06F12/16 主分类号 G06F12/16
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