发明名称 D/A CONVERSION CIRCUIT
摘要 PURPOSE:To stop a counter when comparison voltage changes from H level to L level, and to set initially a sound volume to 2<n>-stage resolution by only one terminal by comparing dividing voltage of a variable resistor with the voltage into which output value of a n-bit counter is DC-converted when throwing in power supply. CONSTITUTION:When throwing in power supply, the 1st and 2nd n-bit counters 1 and 7 start to count the basic clock F, and the comparator 10 compares the DC voltage which devided of a resistor 12 with output of the counter 7. When the DC voltage of the counter 7 is higher, input of the clock f into the counter 7 is stopped. The counted value of the counter 7 is inputted as data value into a n-bit up/down counter 6, and output of the counter 6 is equal to that of the counter 7. Outputs of the counter 1 and 6 are added to a coincidence circuit 2, the FF3 outputs pulse width modulated wave corresponding to data of the counter 7, and a terminal 14 outputs the same voltage as that which the resistor 12 devides to.
申请公布号 JPS6029050(A) 申请公布日期 1985.02.14
申请号 JP19830118326 申请日期 1983.07.01
申请人 HITACHI SEISAKUSHO KK 发明人 ITAGAKI TSUGIO
分类号 H03M1/82;H03M1/66;H04N5/60 主分类号 H03M1/82
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