发明名称 PROCESSING CIRCUIT OF VIDEO SIGNAL
摘要 PURPOSE:To ensure reproduction of stable pictures with a circuit which performs the reading and writing actions alternately through a pair of processing circuits and processes video signals, by using composite clock pulses of two systems. CONSTITUTION:The video signals supplied to an input terminal P1 are applied to the 1st and 2nd processing circuits CP1 and CP2 every one hour by means of switches S1 and S2. The video signals delivered from the circuits CP1 and CP2 and having undergone compression or enlargement of the horizontal cycle or the band are switched by a switch S3 and delivered to an output terminal P2 in the form of continuous signals. The circuits CP1 and CP2 consist of memories such as CCDs, etc. and are driven by composite pulses A and B. For these pulses of two systems, the coincidence is secured for the clock phase between the read and write modes in a horizontal cycle. Therefore the sampling points of the video signals are coincident with each other every scan line. This secures the stable pictures.
申请公布号 JPS6018088(A) 申请公布日期 1985.01.30
申请号 JP19830125405 申请日期 1983.07.12
申请人 TOSHIBA KK 发明人 TAJIMA TERUO
分类号 H04N5/262;H04N5/14;H04N9/74;(IPC1-7):H04N9/74 主分类号 H04N5/262
代理机构 代理人
主权项
地址