发明名称 |
Electrical partitioning scheme for improving yields during the manufacture of semiconductor memory arrays |
摘要 |
Circuitry for isolating and rendering inoperative faulty storage devices in a semiconductor memory array is disclosed. A determination is made as to whether the x-addresses of the faulty storage devices contain an address bit having a common value for all of the faulty storage devices. If such an address bit exists, the address buffer associated with the common address bit is programmed to lock in a permanent set of address indicator outputs. All x-address locations accessed by address signals containing the common address bit are thereafter disabled. The memory array continues to function at half its former storage capacity, using the storage devices associated with the remaining address locations. |
申请公布号 |
US4489401(A) |
申请公布日期 |
1984.12.18 |
申请号 |
US19820367332 |
申请日期 |
1982.04.12 |
申请人 |
SEEQ TECHNOLOGY, INC. |
发明人 |
SMARANDOIU, GEORGE;PERLEGOS, GEORGE |
分类号 |
G11C29/00;(IPC1-7):G11C11/40 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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