| 摘要 |
PURPOSE:To enable to microscopically form a CMOS and to reduce the generation of latch-up by a method wherein an MOS field-effect transistor of a reverse conductive type to a substrate is provided at a diffusion region, which conducts with the substrate, and an MOS field-effect transistor of the same conductive type as the substrate is provided in an epitaxial layer, and moreover, the buried layer of a reverse conductive type is provided at the lower part of the transistor of the same conductive type. CONSTITUTION:A P type buried layer 3 and P type well layer 5, which is formed from the surface of an epitaxial layer 4, are made to respectively contact to the prescribed parts of the N type epitaxial layer 4, thereby forming a diffusion region, which conducts with a substrate. An N type channel MOS transistor is formed at the surface region of the P type well layer 5. A P channel MOS transistor is formed at the surface region of an epitaxial layer 2 other than the P type well layer 5. Before the P channel MOS transistor is provided, this transistor has been readied to such a structure that an N type buried layer can be provided at any time at the lower part thereof. By complementarily connecting the N channel MOS transistor and the P channel MOS transistor, a CMOS circuit can be realized.
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