发明名称 |
SYNCHRONIZING SIGNAL DETECTING CIRCUIT FOR DIGITAL SIGNAL TRANSMISSION |
摘要 |
PURPOSE:To prevent detecting a pseudo synchronizing signal as a synchronizing signal by outputting the output of a counter which is reset when the synchronizing signal output that is decided correct by an error check code is obtained continuously by the prescribed number of times. CONSTITUTION:The reproduction digital signal which is synthesized with a block unit of a prescribed signal format is supplied to an input terminal 1. This digital signal is supplied to a gate circuit 6 via a shift register 2, and the circuit 6 outputs the logic 1 as a detection signal when the data has the value of a fixed pattern equal to a prescribed synchronizing signal. Hereafter counters 10 and 22 are synchronous with each other by the detection signal supplied from the circuit 6 in a normal reproduction mode where the detection signal of the circuit 6 is continuously coincident by N times with the pulse synchronized in phase with the last bit of the synchronizing signal outputted from a decoder 12. Therefore a decoder 23 produces a pulse synchronized in phase with the final bit of the reproduction synchronizing signal. This output pulse is outputted through an output terminal 24 as a synchronizing signal detecting circuit. |
申请公布号 |
JPS59221047(A) |
申请公布日期 |
1984.12.12 |
申请号 |
JP19830095337 |
申请日期 |
1983.05.30 |
申请人 |
NIPPON VICTOR KK |
发明人 |
UENO SHIYOUJI;NISHIKAWA KAZUNORI;IWASAKI YOSHIKI;MASUDA ISAO;FURUMURA MAKOTO |
分类号 |
G11B20/10;H04L7/027;H04L7/04;H04L7/08 |
主分类号 |
G11B20/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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