| 摘要 |
PURPOSE:To enable to manufacture an FET in a recessed gate structure formed into a higher withstand voltage state with a favorable reproducibility by a method wherein the forms of the overhang-shaped eaves parts of resist layers and the evaporating angle of a gate electrode material are controlled. CONSTITUTION:An N type GaAs semiconductor layer 12 is grown on a semiinsulative GaAs substrate 11, a drain electrode 13 and source electrodes 14 are formed on the surface of the layer 12 and a first coated layer 15 is adhered on these. Then, resist layers 16, formed in an overhang-shape in between the electrode 13 and the electrodes 14, are formed on the electrodes 14. A second coated layer 17 is made to adhere on each surface on the layer 15. At this time, the second coated layer 17 is not adhered on the layer 15 covered with the overhang-shaped eaves parts of the resist layers 16. The layer 15 is removed by performing an etching using the layers 16 and the layer 17 as the mask and first holes 18 are formed. The layer 12 exposing from the holes 18 is performed an etching and second holes 19, which are respectively used as a recessed part, are formed. Then, Schottky gate electrodes 20 are formed at an evaporating angle selected in such a way that the distances from the edges on the side of the electrode 13 are respectively larger than those from the edges on the sides of the electrodes 14 into the holes 19. |
