发明名称 DELAY EQUALIZER
摘要 PURPOSE:To realize an element, and also to offer a delay equalizer having good stability even in case of a temperature variation by dividing a delay distortion of the delay equalizer, and connecting a delaying circuit having the divided delay distortion concerned by the number of divisions, so that an (m) value of a ratio of each element can be selected in a prescribed value or more. CONSTITUTION:In a delay equalizer constituted by connecting several sections of a delaying circuit, when a ratio La/Lb=m<3> of each inductance element for constituting a delay equalizing circuit, or a value of m<3> of a ratio Cb/Ca=m<3> of each capacitor element is below a prescribed value, it becomes difficult to realize a value of the inductance or the capacitor, or a variation of a delay characteristic by a variation of each element is suppressed, therefore, a delay distortion 7 of the delay equalizer is divided so that the value of m<3> becomes the prescribed value or more, and a means for forming a delaying circuit having this divided delay distortion is provided so that this delaying circuit is connected by the number of divisions of the delay distortion.
申请公布号 JPS59202721(A) 申请公布日期 1984.11.16
申请号 JP19830076531 申请日期 1983.04.30
申请人 FUJITSU KK 发明人 OKAMURA HAJIME;TSUNOISHI MITSUO
分类号 H03H7/01;H04B3/04;H04B3/14 主分类号 H03H7/01
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