发明名称 GENERATING CIRCUIT OF REFERENCE VOLTAGE
摘要 PURPOSE:To decrease the number of circuit elements by using a depression type MOSFET to constitute a constant current source and supplying the constant current to an enhancement type MOSFET. CONSTITUTION:An MOSFETQ1 has a depression type function and therefore N<+> is doped as the 1st conduction type impurity to a poly-silicon layer forming a gate electrode of the FETQ1. While P<+> is doped as the 2nd conduction type impurity to a poly-silicon layer forming a gate electrode of an MOSFETQ2 which functions as an enhancement type. The constant current produced by the FETQ1 is supplied to the FETQ2. For this purpose, a series connection is formed as shown in the diagram. Then the reference voltage Vref is obtained from the gate and the source of the FETQ2.
申请公布号 JPS59200320(A) 申请公布日期 1984.11.13
申请号 JP19830072875 申请日期 1983.04.27
申请人 HITACHI SEISAKUSHO KK 发明人 SAKAGUCHI JIROU
分类号 G05F1/56;G05F3/24 主分类号 G05F1/56
代理机构 代理人
主权项
地址