发明名称 MEMORY ACCESS CONTROL SYSTEM
摘要 PURPOSE:To reduce considerably the amount of hardware by storing only minimum information, which is required for the extraction of memory access request, in a shift register whose degree of integration is lower than that of a register file. CONSTITUTION:The memory access request issued from a memory access request source 21 is selected by a memory access request selecting means 22. Memory access information consisting of the memory access request, a memory address, a request code, and a request source code is registered in the first buffer means 23 consisting of the register file. Memory access information, which consists of a memory band number accompanied with the memory access request and information indicating the priority of the memory access request, and contents of a register address register 27 of the first buffer means 23 where the memory access request is registered are registered in the second buffer means 24 consisting of the shift register.
申请公布号 JPS59189463(A) 申请公布日期 1984.10.27
申请号 JP19830064053 申请日期 1983.04.12
申请人 NIPPON DENKI KK 发明人 HASEGAWA MASAO
分类号 G06F12/00;G06F12/06;G06F13/18 主分类号 G06F12/00
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