| 摘要 |
PURPOSE:To obtain three-dimensional structure suitable for a NAND gate circuit by each forming two gate electrodes to upper and lower sections through a gate insulating film while holding a channel region in a semiconductor substrate and surrounding the electrodes by an insulating film thicker than the gate insulating film when preparing an MIS transistor. CONSTITUTION:An SiO2 film 11 is formed on the surface of a P type Si substrate 1, and As ions, etc. are implanted through the film 11 to shape an N<+> type Si gate electrode 2. A P type polycrystalline Si film 4 as a channel region is deposited on the whole surface including a gate insulating film 3 consisting of the film 11 positioned on the electrode 2 while selecting the quantity of an impurity so as to obtain a desired threshold value, a gate insulating film 5 corresponding to the electrode 2 is formed on the film 4, and a gate electrode 6 composed of N<+> type polycrystalline Si is deposited. N<+> type source region 7 and drain region 8 are formed to the film 4 through an ion implantation while being positioned on both sides of the electrode 6, and the electrode 6 is surrounded by a thick insulating film. |
