发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain a power longitudinal MOS FET having low ON resistance and low input capacity by forming a gate electrode ultrafinely and forming the channel longitudinally by etching. CONSTITUTION:A high density N type layer 12 is formed on an N type silicon substrate 11, and the first conductive type, i.e., low density N type layer 13 is formed. Then, the second conductive type, i.e., P type channel layer 14 are formed by diffusing, and the third conductive type, i.e., a source layer 15 is formed by n type impurity diffusion. Then, one or more polygonal grooves 21 are formed by etching with and etchant of fluoric acids in the layer 14 and on the periphery. Thereafter, the fourth conductive type, i.e., high density P type layer 16 is formed. Then, an annular gate electrode 19 is formed of polycrystalline silicon or metal directly on the channel. Subsequently, an oxidized film 18 is formed as the second insulating film on the overall surface, and windows for connecting simultaneously the layers 15, 16 to the electrode 20, and the source electrode 20 is formed by aluminum or polysilicon to complete an MOS FET.
申请公布号 JPS59181668(A) 申请公布日期 1984.10.16
申请号 JP19830055822 申请日期 1983.03.31
申请人 FUJITSU KK 发明人 NAKATANI YASUTAKA
分类号 H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L29/78
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