发明名称 ARITHMETIC CONTROL DEVICE
摘要 PURPOSE:To prevent redundant calculation and to improve the practical arithmetic processing speed of a variable-length data, by checking the number of effective figures of the 2nd operand and performing the precheck of overflow by using the checked result. CONSTITUTION:An Reg II (the number of effective figures of the 2nd operand) selected by a selector 33 and an L1*2 (which is obtained by shifting L1 data leftward by one bit) selected by another selector 34 are inputted into an adder- subtracter 35. When the subtraction result of L1*2-Reg II is 0 (zero) or negative, it is judged that overflow occurs. In case where it is judged that overflow occurs, the calculation is not executed by a calculating section and a condition code indicating overflow is produced by treating the calculation as processing- terminated one. On the other hand, when no overflow is judged as a result of the calculation, arithmetic of (the 1st operand + one digit) is executed by the arithmetic section.
申请公布号 JPS59174942(A) 申请公布日期 1984.10.03
申请号 JP19830049929 申请日期 1983.03.25
申请人 TOSHIBA KK 发明人 EGUCHI KAZUTOSHI
分类号 G06F7/00;G06F7/50;G06F7/505;G06F7/76 主分类号 G06F7/00
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