| 摘要 |
PURPOSE:To reduce the time until acquisition of synchronism by using an output of a synchronizing pattern detecting circuit as a frame synchronizing signal until a frame synchronism acquiring detecting signal goes to 1. CONSTITUTION:Bit correlation of a data signal is taken with a synchronizing signal at a synchronizing bit pattern detecting circuit 8, and the signal reaching a certain value or over is regarded as the signal possible for the frame synchronizing signal and outputted. Then, a start signal is applied to a reset terminal of an R-SFF10, an output (f) of the FF10 is in the state of 0 at first and kept until a frame acquisition detecting signal of the circuit 8 goes to 1, and a selecting switch 9 outputs an output (b) of a synchronizing bit pattern detecting circuit 7 as a synchronizing frame synchronizing signal (g). On the other hand, when the frame acquisition detecting signal of the circuit 8 goes to 1, the FF10 is set and the switch 9 selects a frame correlating output (e), then the signal (e) is used for the frame synchronism signal (g). |
