| 摘要 |
PURPOSE:To improve the gate withstand voltage and reduce the short channel effect without varying the FET characteristic by removing the under side of the gate electrode of the FET in a fixed amount with said electrode as a mask. CONSTITUTION:A conductive layer 32 as the channel is formed on a semi- insulation substrate 31. Next, the pattern of a heat resistant metal is formed on the layer 32 and made as the gate electrode 33. Then, a donor is implanted with the electrode 33 as a mask. Heat treatment is performed after etching the substrate 31 with the electrode 33 as a mask, thus forming the source and drain regions 34 and 35, and then the source and drain electrodes 36 and 37 are formed. Here in the etching process for the substrate, when anisotropic etching is performed with non-selective etchant, and next selective etching is used, it follows that only a high concentration layer under the electrode 33 can be etched. Therefore, the control of the etching amount is easy. Thereby, the deterioration of gate electrode withstand voltage generated by the contact of said electrode with the high concentration layer can be prevented. |
