发明名称 ARITHMETIC CONTROLLER OF COMMUNICATION CONTROLLER
摘要 PURPOSE:To perform an arithmetic with high stability and at a high speed by switching the clock which is supplied to an error check code arithmetic part immediately after a communication controller accepts an error check character, to an internal arithmetic clock from a circuit transmission/reception clock. CONSTITUTION:An arithmetic clock switch circuit 8 is set at a preceding stage of an error code arithmetic circuit 9, and an indication is given to a mode register 5. Thus a circuit transmission/reception clock is switched to an internal clock sent from a clock controller 7 when the final character is transmitted and received. Then the arithmetic control is carried out with the stable internal clock. In such a way, the circuit 9 is switched to the output side of the controller 8 for calculation even though a terminal of the opposite side turns off a little ealier a transmission request, so that the arithmetic is stabilized.
申请公布号 JPS59165547(A) 申请公布日期 1984.09.18
申请号 JP19830039710 申请日期 1983.03.09
申请人 NIPPON DENKI KK 发明人 NAKAMURA KOUICHI
分类号 H03M13/00;H04L1/00;H04L13/00;H04L29/02 主分类号 H03M13/00
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