| 摘要 |
<p>PURPOSE:To attain a high speed and the IC formation by attaining the synchronization of a loop transmission system with use of an RAM. CONSTITUTION:A counter 14 starts counting when the reception transmission information RXD is supplied and accordingly a clock RXC is supplied. The count value of the counter 14 is delivered to a selector 16 in the form of a writing address WA. At the same time, a transmission clock TXC generated from an oscillating circuit is counted by a counter 15, and a reading address RA is delivered. A writing designation signal WC' is produced with a reception clock RXC and a clock 2TXC which is double as much as the transmission clock TXC. An RAM10 is set in a writing mode, and the selector 16 selects the side of the WA. Then the RAM10 performs writing. While a reading designation signal RC' is produced with the clocks TXC and 2TXC. Then the transmission information TXD is read out of the RAM10 with the address RA.</p> |
