| 摘要 |
<p>PURPOSE:To allow a processor to know timer contents immediately and to perform plural timer operations corresponding to plural processes in the processor by clocking the time by using an optional address in the storage device in the processor. CONSTITUTION:The storage device 2 of the processor holds instructions to be executed by a CPU1 or data. When the CPU1 sends a setting instruction for an objective address of clocking or a timer value, the controller 3 receives and holds the address and timer value and waits for a clocking start instruction from the CPU1. Then when the clocking start instruction is executed by the CPU1, the controller 3 receives it and performs timer operation by increasing the contents of the timer value which is already indicated at specific intervals of time to write the contents in the address of the device 2. Further, when the CPU1 executed a clocking stop instruction, the controller 3 receives it to increase the contents at specific intervals of time, and stops writing the clocked value in the specific address.</p> |
