发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To reduce the unnecessary power consumption with a non-selected decoder by controlling X decoder activating signals of two groups of memory cell arrays with the most significant bit of an address Y. CONSTITUTION:Memory cell arrays 1a and 1b as well as 1c and 1d which are divided into four parts to form two groups are selected by X decoders 21 and 22 which work in response to the activating signal sent from an NAND gate, etc. to which the most significant bit of a chip selection signal and an address Y is impressed together with the inverted most significant bit of a chip selection signal and an address Y. Therefore no activating signal is impressed to the decoder 21 or 22 of the non-selection side. Thus the unnecessary power consumption is reduced with a non-selected decoder.
申请公布号 JPS59157884(A) 申请公布日期 1984.09.07
申请号 JP19830030288 申请日期 1983.02.25
申请人 NIPPON DENKI KK 发明人 SUEYOSHI SHIGETAKA
分类号 G11C11/413;G06F12/06;G11C8/00 主分类号 G11C11/413
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