发明名称 CONTROL SYSTEM OF MEMORY
摘要 PURPOSE:To attain access equal to the memory having constitution using a memory unit of the same capacity as a conventional type for a memory containing the memory units of different loading capacity by converting the memory unit address signal accessed from a central controller into a selection address signal. CONSTITUTION:The memory unit address signal among the address signals impressed by a CPU is converted into the selection address signal by an SRAM2b for each access given from the CPU and transmitted to a decoder 3. The decoder 3 does not work with the memory region selection signal and transmits this signal as it is and then decodes the upper memory unit selection signal to select the corresponding memory unit. The memory region selection signal is transmitted after the memory unit is selected by the memory unit selection signal. Then the address signals corresponding to the remaining address signals are impressed for access.
申请公布号 JPS59146491(A) 申请公布日期 1984.08.22
申请号 JP19830020160 申请日期 1983.02.09
申请人 FUJITSU KK 发明人 IIJIMA KIYOKATSU
分类号 G06F12/06;G11C8/00 主分类号 G06F12/06
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