| 摘要 |
PURPOSE:To perform a clearing action at a high speed for a memory which is used to a large-scale computer by supplying the write signal directly to the data line which forms a memory array. CONSTITUTION:Both a refresh signal REF and a write enable signal WE are set at a low level respectively, and therefore the output of a gate circuit G is set at a high level. Then an MOSFETQ10 or Q13 is turned on, and a refresh control circuit REFC starts its action. In this case, the signal REF is kept at a low level. Then a timer circuit operates to count up a counter circuit in response to the timing signal phi, and therefore internal address signals axO-axi are updated. Thus a row address decoder switches successively word lines, and a low level is written to a memory cell connected to a word line. The above-mentioned operation is carried out to all word lines. Thus it is possible to clear the memory information of all memory cells to a low level. |
