发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To eliminate the need for the operation of an address converting table in advance and to attain ease of program switching by providing a switching means switching contents of an address pointer storage means and a comparison means comparing an output of the switching means with contents of an address pointer table. CONSTITUTION:A discriminating circuit 18 compares a high-order address bit 10a with a task address lower limit 16a read from a task address lower limit register 16, compares the high-order address bit 10a with a task address upper limit 17a read from a task address upper limit register 17, and when the high- order address bit 10a is over the task address lower limit 16a and below the task address upper limit 17a, an address pointer selecting signal line 18a is brought into ''1''. An address pointer read from an address pointer table 12 is compared with the said address pointer 15a at a comparator 20 by the high- order address bit 10a. The comparator 20 gives a coincidence signal to an address converting circuit 19 via the line 20a in response to the coincidence of both the address pointers and gives a dissidence signal to a descriptor request circuit 21 via the line 20b in response to the dissidence.
申请公布号 JPS59132482(A) 申请公布日期 1984.07.30
申请号 JP19830007873 申请日期 1983.01.20
申请人 NIPPON DENKI KK 发明人 UCHIDA MITSUJIROU
分类号 G06F12/02;G06F12/10;G06F13/00 主分类号 G06F12/02
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