发明名称 |
DIGITAL VERTICAL SYNCHRONIZING DEVICE |
摘要 |
PURPOSE:To attain stabilization and rationalization of operation by varyig automatically a self-reset frequency of a counter circuit depending on the level of an input synchronizing signal in a television receiver. CONSTITUTION:A vertical synchronizing signal A obtained with digital integration from a composite synchronizing signal and an output E of a counter circuit 7 are added digitally, the result is compared with a comparison DC signal H and a control pulse B is obtained. On the other hand, the vertical synchronizing signal A is led to a synchronizing detecting circuit 9, where a synchronizing detecting signal F is obtained. The obtained signal F is added to a set data f0 and the result is led as a preset data of the counter circuit 7 in the timing of the control pulse B. Thus, the frequency of the counter circuit 7 is adjusted automatically. |
申请公布号 |
JPS59117871(A) |
申请公布日期 |
1984.07.07 |
申请号 |
JP19820231822 |
申请日期 |
1982.12.24 |
申请人 |
MATSUSHITA DENKI SANGYO KK |
发明人 |
MIYAZAKI KOUZOU;YAMAGUCHI NAMIO |
分类号 |
H04N5/06;(IPC1-7):04N5/06 |
主分类号 |
H04N5/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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