| 摘要 |
PURPOSE:To evade the collision between a refreshing operation and a direct access transfer operation by providing a gate means between a microprocessor and a direct memory access controller. CONSTITUTION:A DMA (direct memory access) transfer request signal outputted from the DMA controller DMA is applied to an input terminal D of an FF. Then, a refreshing operation signal REFGNT' sent from a memory board DRAM to the microprocessor MPU is applied to the clock terminal CK of the FF. A DMA transfer request signal HALT to the MPU appears at its output terminal Q. Even if the signal REFGNT' goes down to a level L to send out a signal DREQ out of the DMA during refreshing operation, the FF does not perform an inverting operation, so the signal does not reach the MPU. Therefore, the DMA stands by without performing DMA transfer. Consequently, the collision between the refreshing operation and DMA transfer operation is evaded. |
