| 摘要 |
PURPOSE:To put a system in optimum operation by stopping selectively the operation of only a sequence controller in trouble or all sequence controllers. CONSTITUTION:For example, a selection switch 14 is closed and some slave sequence controller gets out of order to input an error signal (ai). In this case, ''1'' is outputted by an AND gate 16 and set in an error register 17, thereby outputting a hold signal (b) and a clear signal (c) to a processor 12 and an input/output device 13. Consequently, the processor 12 enters a hold state and the device 13 stops control outputs to respective mechanism parts. Consequently, the operation of all slave sequence controllers is stopped. When the switch 14 is left open, the gate 16 generates no output even if the error signal (ai) is inputted ad neither the signal (b) nor (c) is sent from the register 17. Therefore, the operation of only the slave sequence controller in trouble is stopped. |
