发明名称 PICTURE SIGNAL PROCESSOR
摘要 PURPOSE:To perform a high speed processing at relatively low cost by once transferring the picture data from a picture data memory device to a work memory and carrying out a picture processing by the use of the picture data. CONSTITUTION:When performing a vector convolution integral of 0 deg. direction is performed on the picture data in a dynamic RAM41a, the 256 picture data of j=0 line is simultaneously read in a serial input and output circuit 41b. The first picture data D0,0 is shifted and loaded to a register 10c, further, the data D0,1 is similarly loaded to the register 10c. At this time, the contents (D0,0) of the register 10c is shifted to a register 10b. In a processor 10, considering the data D0=0, D1=D0,0, D2=D0,1 in the registers 10a-10c, G0=omega0D0+omega1D1+omega2D2 is calculated, the calculation result G0 is preserved in a resister in which the picture data of the serial input and output circuit 41b is stored. Similarly, the picture processed in a whole of one line and when the calculation result is obtained, it is stored in the dynamic RAM41a.
申请公布号 JPS6289171(A) 申请公布日期 1987.04.23
申请号 JP19850228741 申请日期 1985.10.16
申请人 FANUC LTD 发明人 KURAKAKE MITSUO;OTSUKA SHOICHI
分类号 G06F17/10;G06T5/20 主分类号 G06F17/10
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