| 摘要 |
<p>A combinational logic device, such as a AND gate (21), is connected to control the flow of information along a wordline (W1...Wn) from the AND plane (11) to the OR plane (14) of a PLA (programmed logic array). To each such combinational logic device is applied an input signal (W) from a source external to the PLA, so that the PLA"s output can respond relatively quickly to this input signal-- that is, the PLA is capable of relatively quick decision making. </p> |
