发明名称 LINE SUPERVISORY SYSTEM OF TIME DIVISION DIRECTIONAL CONTROL TRANSMISSION SYSTEM
摘要 PURPOSE:To supervise an error characteristic with high accuracy without adding a new bit by utilizing that a DC balance of a burst signal is kept to detect a code error, and using the polarity of the 1st bit of a burst signal in opposite direction to use the result of error detection as a toward station alarm signal. CONSTITUTION:A code error detecting circuit 34 of a subscriber's equipment 17 is connected to an equivalent amplifier circuit 19 and a control circuit 32, and an output of the circuit 34 controls a line driver 25. Further, a code error detecting circuit 35 and a counter station alarm detecting circuit 36 are connected to an equivalent amplifier circuit 26 and a control circuit 33. The sum of 1s in a burst signal is discriminated by using a receiving pulse from the circuit 19 and a frame synchronizing signal from the circuit 32 at the circuit 34 of the subscriber side and the result is added to the circuit 25. When the result of discrimination, by this circuit 25 is an odd number, the polarity of the 1st bit of the next burst signal is inverted and the result is transmitted to a telephone station 11. Further, the circuit 36 discriminates the presence of inversion of the polarity of the 1st bit at each burst signal, allowing to detect an erroneous bit with high accuracy.
申请公布号 JPS59107662(A) 申请公布日期 1984.06.21
申请号 JP19820217252 申请日期 1982.12.10
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 SASAGAWA MASAAKI;KOMIYA HISHIICHI
分类号 H03M5/18;H04L1/00;H04L5/16;H04L23/00;H04L25/02;H04L25/49 主分类号 H03M5/18
代理机构 代理人
主权项
地址