发明名称 |
INTERFACE CIRCUITS BETWEEN INJECTION-LOGIC LAYERS WHICH ARE SUPERIMPOSED AND BIASSED WITH DIFFERENT VOLTAGES |
摘要 |
<p>PHF 80.575 11 1.8.1981 Interface circuits between injection-logic layers which are superimposed and biassed with different voltages. For transferring a logic signal between a first stage and a second stage at higher level in an integrated current injection logic circuit formed by superimposed layers which are biassed with different voltages (for example an I2L logic circuit), the collector of a first transistor (10) at the output of the first stage controls the base of a first auxiliary transistor (12), whose collector is connected to the base of a second transistor (13), which provides the connection to the input of the second stage. In order to rapidly drain the charge stored in the base of the second transistor (13), said base is connected to the base of a third transistor (14), whose collector is connected to its base so as to form a current mirror. The switching time of the device in accordance with the invention is thus substantially reduced. Moreover, said device has the special feature that the logic levels are situated on both sides of a reference voltage applied to the base of a second auxiliary transistor (15), which enables it to be used as an interface between different types of logic circuits. Application: information processing. Reference: Figure 2.</p> |
申请公布号 |
CA1169499(A) |
申请公布日期 |
1984.06.19 |
申请号 |
CA19810386529 |
申请日期 |
1981.09.23 |
申请人 |
N.V. PHILIPS'GLOEILAMPENFABRIEKEN |
发明人 |
PELLETIER, JOEEL A.;BREUILLARD, ROBERT |
分类号 |
H03K19/091;H03K19/018;(IPC1-7):H03K19/082 |
主分类号 |
H03K19/091 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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