发明名称 Circuit and technique for initializing the state of bistable elements in an integrated electronic circuit
摘要 A circuit and technique provided as part of an integrated circuit for assuring that the circuit's many bistable elements are properly initialized into their desired state when the power is turned on to the circuit. An initialization signal is developed for forcing the bistable element to their pre-determined states as the voltage of the power source is brought up from zero to its full value. This is accomplished by using another bistable element to monitor the rise in the supply voltage and turn off the initialization signal only after the supply voltage has risen well above the threshold voltage of the various bistable elements on the circuit. Hysteresis is provided in order to prevent the initialization signal from turning on if the supply voltage temporarily dips below that at which the monitor element turns off the initiation signal.
申请公布号 US4446381(A) 申请公布日期 1984.05.01
申请号 US19820370601 申请日期 1982.04.22
申请人 ZILOG, INC. 发明人 DALRYMPLE, MONTE J.
分类号 H03K3/356;H03K17/22;(IPC1-7):H03K17/22;H03K17/30;H03K17/68 主分类号 H03K3/356
代理机构 代理人
主权项
地址