发明名称 SPECIFYING SYSTEM FOR NUMBER OF RUN STEPS
摘要 PURPOSE:To improve debugging effect by storing a processing program which controls the number of execution steps of an online program being debugged as a counter in specific addresses. CONSTITUTION:The execution of the start origin program S at a start origin control part 2 is started, the number (n) of steps to be debugged at a point after the execution is set in a counter CNT for the number of steps, and the trace specifying flag TRC of a control register SCR is turned on at a point B. Then, a branch instruction to the 1st execution address of a test program T is executed at a point C. Consequently, the instruction counter part iC of a program status word PSW indicates an address N and an instruction in an address N is read to an instruction register iR and executed. At this time, an interruption is caused to test the TRC. Consequently, when the TNC is on, the current contents of the PSW are saved in a specific address L of a main storage device 1. Then, an interruption processing program is executed successively to decrease the (n) in the CNT by one, and the program is executed continuously until the (n) attains to zero.
申请公布号 JPS5968067(A) 申请公布日期 1984.04.17
申请号 JP19820179512 申请日期 1982.10.13
申请人 FUJITSU KK;FUJITSUU DAIICHI TSUUSHIN SOFUTOUEA KK 发明人 TANAKA YUTAKA;KAWAMOTO HIROSHI
分类号 G06F11/28;G06F11/36 主分类号 G06F11/28
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