| 摘要 |
PURPOSE:To prevent an input/output device from being occupied by a high- speed system when said input/output system is shared by a system considerably different in performance among high-order processors, by providing such as a means to each bus to respond and store that the input/output controller is busy. CONSTITUTION:A means is provided to each bus to answer and store that an input/output controller is busy. For instance, if an input/output request is set from a bus A via a driver/receiver 5, an operation is started by a sequence control circuit 7 as long as no suppression signal is sent from a common control circuit 15. Then the suppression signal is transmitted to sequence circuits 7 and 8. If an input/output request is given from a bus B under such conditions, this request is transmitted to the circuit 8 via a driver/receiver 6. However the circuit 8 answers a busy state since the suppression signal is received and at the same time sets the fact that it responded to a busy state display register 10. Then an end signal is sent to the circuit 7 when the processing is finished by the input/output request fed from the bus A. |
