| 摘要 |
PURPOSE:To contrive to increase the integration degree and reduce the area by a method wherein a switching transistor part and an accumulation capacitor part are both buried in a recess provided in an Si substrate. CONSTITUTION:Polycrystalline Si electrodes 4 and 5 are buried, in the width direction of the Si substrate 1, in the substrate via oxide films 6 and thus form the switching transistor parts 2 and the accumulation capacitor parts 3; the transistor part 2 connects a bit layer (N<+> layer) 7 on the upper surface of the substrate 1 to the accumulation capacitor part 3 and performs the exchange of charges. The oxide films 6 between the electrode 4 and the substrate 1 and between the electrode 5 and the substrate 1 are thin gate oxide films, and isolation oxide films 8 are provided to isolate each memory cell. Polycrystalline Si layers 9 are doped with P<+>, and P<+> layers 10 are formed thereunder. Further, an insulation film such as a PSG film, bit electrodes 12, and bit wirings 13 are provided. |
